Simulator report for g07_LAB4
Fri Nov 07 14:06:17 2008
Quartus II Version 8.0 Build 215 05/29/2008 SJ Full Version


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. Simulator Summary
  3. Simulator Settings
  4. Simulation Waveforms
  5. Coverage Summary
  6. Complete 1/0-Value Coverage
  7. Missing 1-Value Coverage
  8. Missing 0-Value Coverage
  9. Simulator INI Usage
 10. Simulator Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2008 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+--------------------------------------------+
; Simulator Summary                          ;
+-----------------------------+--------------+
; Type                        ; Value        ;
+-----------------------------+--------------+
; Simulation Start Time       ; 0 ps         ;
; Simulation End Time         ; 300.0 us     ;
; Simulation Netlist Size     ; 633 nodes    ;
; Simulation Coverage         ;      86.45 % ;
; Total Number of Transitions ; 143229       ;
; Simulation Breakpoints      ; 0            ;
; Family                      ; Cyclone II   ;
; Device                      ; EP2C20F484C7 ;
+-----------------------------+--------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Simulator Settings                                                                                                                                          ;
+--------------------------------------------------------------------------------------------+------------------------------------------------+---------------+
; Option                                                                                     ; Setting                                        ; Default Value ;
+--------------------------------------------------------------------------------------------+------------------------------------------------+---------------+
; Simulation mode                                                                            ; Timing                                         ; Timing        ;
; Start time                                                                                 ; 0 ns                                           ; 0 ns          ;
; Simulation results format                                                                  ; CVWF                                           ;               ;
; Vector input source                                                                        ; G07_binary_to_base100_TESTBED/testbed_WAVE.vwf ;               ;
; Add pins automatically to simulation output waveforms                                      ; On                                             ; On            ;
; Check outputs                                                                              ; Off                                            ; Off           ;
; Report simulation coverage                                                                 ; On                                             ; On            ;
; Display complete 1/0 value coverage report                                                 ; On                                             ; On            ;
; Display missing 1-value coverage report                                                    ; On                                             ; On            ;
; Display missing 0-value coverage report                                                    ; On                                             ; On            ;
; Detect setup and hold time violations                                                      ; Off                                            ; Off           ;
; Detect glitches                                                                            ; Off                                            ; Off           ;
; Disable timing delays in Timing Simulation                                                 ; Off                                            ; Off           ;
; Generate Signal Activity File                                                              ; Off                                            ; Off           ;
; Generate VCD File for PowerPlay Power Analyzer                                             ; Off                                            ; Off           ;
; Group bus channels in simulation results                                                   ; Off                                            ; Off           ;
; Preserve fewer signal transitions to reduce memory requirements                            ; On                                             ; On            ;
; Trigger vector comparison with the specified mode                                          ; INPUT_EDGE                                     ; INPUT_EDGE    ;
; Disable setup and hold time violations detection in input registers of bi-directional pins ; Off                                            ; Off           ;
; Overwrite Waveform Inputs With Simulation Outputs                                          ; On                                             ;               ;
; Perform Glitch Filtering in Timing Simulation                                              ; Auto                                           ; Auto          ;
+--------------------------------------------------------------------------------------------+------------------------------------------------+---------------+


+----------------------+
; Simulation Waveforms ;
+----------------------+
Waveform report data cannot be output to ASCII.
Please use Quartus II to view the waveform report data.


+--------------------------------------------------------------------+
; Coverage Summary                                                   ;
+-----------------------------------------------------+--------------+
; Type                                                ; Value        ;
+-----------------------------------------------------+--------------+
; Total coverage as a percentage                      ;      86.45 % ;
; Total nodes checked                                 ; 633          ;
; Total output ports checked                          ; 679          ;
; Total output ports with complete 1/0-value coverage ; 587          ;
; Total output ports with no 1/0-value coverage       ; 82           ;
; Total output ports with no 1-value coverage         ; 86           ;
; Total output ports with no 0-value coverage         ; 88           ;
+-----------------------------------------------------+--------------+


The following table displays output ports that toggle between 1 and 0 during simulation.
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Complete 1/0-Value Coverage                                                                                                                                                                                                                                                                                  ;
+---------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------+------------------+
; Node Name                                                                                                                                   ; Output Port Name                                                                                                                            ; Output Port Type ;
+---------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------+------------------+
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G0|Q[3]                                                                         ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G0|Q[3]                                                                         ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G0|Q[4]                                                                         ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G0|Q[4]                                                                         ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G0|Q[5]                                                                         ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G0|Q[5]                                                                         ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G0|Q[2]                                                                         ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G0|Q[2]                                                                         ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G0|Q[6]                                                                         ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G0|Q[6]                                                                         ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G2|Q[3]                                                                         ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G2|Q[3]                                                                         ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G2|Q[0]                                                                         ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G2|Q[0]                                                                         ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G2|Q[4]                                                                         ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G2|Q[4]                                                                         ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G2|Q[5]                                                                         ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G2|Q[5]                                                                         ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G2|Q[2]                                                                         ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G2|Q[2]                                                                         ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G2|Q[6]                                                                         ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G2|Q[6]                                                                         ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G4|Q[3]                                                                         ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G4|Q[3]                                                                         ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G4|Q[0]                                                                         ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G4|Q[0]                                                                         ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G4|Q[4]                                                                         ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G4|Q[4]                                                                         ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G4|Q[5]                                                                         ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G4|Q[5]                                                                         ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G4|Q[2]                                                                         ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G4|Q[2]                                                                         ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[0]                                                                         ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[0]                                                                         ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[2]                                                                         ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[2]                                                                         ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G0|Q[2]~397                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G0|Q[2]~397                                                                     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G0|Q[2]~397                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G0|Q[2]~398                                                                     ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G0|Q[3]~399                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G0|Q[3]~399                                                                     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G0|Q[3]~399                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G0|Q[3]~400                                                                     ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G0|Q[4]~401                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G0|Q[4]~401                                                                     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G0|Q[4]~401                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G0|Q[4]~402                                                                     ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G0|Q[5]~403                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G0|Q[5]~403                                                                     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G0|Q[5]~403                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G0|Q[5]~404                                                                     ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G0|Q[6]~405                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G0|Q[6]~405                                                                     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G0|Q[6]~405                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G0|Q[6]~406                                                                     ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G2|Q[2]~398                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G2|Q[2]~398                                                                     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G2|Q[2]~398                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G2|Q[2]~399                                                                     ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G2|Q[3]~400                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G2|Q[3]~400                                                                     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G2|Q[3]~400                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G2|Q[3]~401                                                                     ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G2|Q[0]~402                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G2|Q[0]~402                                                                     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G2|Q[4]~404                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G2|Q[4]~404                                                                     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G2|Q[4]~404                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G2|Q[4]~405                                                                     ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G2|Q[5]~406                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G2|Q[5]~406                                                                     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G2|Q[5]~406                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G2|Q[5]~407                                                                     ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G2|Q[6]~408                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G2|Q[6]~408                                                                     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G2|Q[6]~408                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G2|Q[6]~409                                                                     ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G4|Q[2]~398                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G4|Q[2]~398                                                                     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G4|Q[2]~398                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G4|Q[2]~399                                                                     ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G4|Q[3]~400                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G4|Q[3]~400                                                                     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G4|Q[3]~400                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G4|Q[3]~401                                                                     ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G4|Q[0]~402                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G4|Q[0]~402                                                                     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G4|Q[4]~404                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G4|Q[4]~404                                                                     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G4|Q[5]~406                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G4|Q[5]~406                                                                     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G4|Q[5]~406                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G4|Q[5]~407                                                                     ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G4|Q[6]~408                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G4|Q[6]~408                                                                     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G4|Q[6]~408                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G4|Q[6]~409                                                                     ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[2]~398                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[2]~398                                                                     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[3]~400                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[3]~400                                                                     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[0]~402                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[0]~402                                                                     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[2]                    ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[2]                               ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[1]                    ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[1]                               ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[0]                    ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[0]                               ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[3]                    ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[3]                               ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[4]                    ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[4]                               ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita0                      ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita0                      ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita0                      ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita0~COUT                 ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita1                      ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita1                      ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita1                      ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita1~COUT                 ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita2                      ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita2                      ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita2                      ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita2~COUT                 ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita3                      ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita3                      ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita3                      ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita3~COUT                 ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita4                      ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita4                      ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita4                      ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita4~COUT                 ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita5                      ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita5                      ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita5                      ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita5~COUT                 ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita6                      ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita6                      ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita6                      ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita6~COUT                 ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita7                      ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita7                      ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita7                      ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita7~COUT                 ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita8                      ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita8                      ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita8                      ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita8~COUT                 ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita9                      ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita9                      ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita9                      ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita9~COUT                 ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita10                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita10                     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita10                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita10~COUT                ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita11                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita11                     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita11                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita11~COUT                ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita12                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita12                     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita12                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita12~COUT                ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita13                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita13                     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita13                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita13~COUT                ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita14                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita14                     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita14                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita14~COUT                ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita15                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita15                     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita15                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita15~COUT                ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita16                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita16                     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita16                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita16~COUT                ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita17                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita17                     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita17                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita17~COUT                ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita18                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita18                     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita18                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita18~COUT                ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita19                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita19                     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita19                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita19~COUT                ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita20                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita20                     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita20                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita20~COUT                ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita21                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita21                     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita21                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita21~COUT                ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita22                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita22                     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita22                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita22~COUT                ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita23                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita23                     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita23                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita23~COUT                ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita24                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_comb_bita24                     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|counter:G9|Add0~66                                                                              ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|counter:G9|Add0~66                                                                              ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|counter:G9|Add0~67                                                                              ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|counter:G9|Add0~67                                                                              ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|counter:G9|Add0~67                                                                              ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|counter:G9|Add0~68                                                                              ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|counter:G9|Add0~69                                                                              ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|counter:G9|Add0~69                                                                              ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|counter:G9|Add0~69                                                                              ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|counter:G9|Add0~70                                                                              ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|counter:G9|Add0~71                                                                              ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|counter:G9|Add0~71                                                                              ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|counter:G9|Add0~71                                                                              ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|counter:G9|Add0~72                                                                              ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|counter:G9|Add0~73                                                                              ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|counter:G9|Add0~73                                                                              ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G0|Q[0]                                                                         ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G0|Q[0]                                                                         ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G0|Q[1]                                                                         ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G0|Q[1]                                                                         ; regout           ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|Equal99~437                                                                                     ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|Equal99~437                                                                                     ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|Equal99~438                                                                                     ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|Equal99~438                                                                                     ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[4]~6741                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[4]~6741                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[4]~6742                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[4]~6742                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[4]~6743                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[4]~6743                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[4]~6744                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[4]~6744                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[4]~6745                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[4]~6745                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[4]~6746                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[4]~6746                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[4]~6747                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[4]~6747                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[2]~6748                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[2]~6748                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[2]~6749                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[2]~6749                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[2]~6750                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[2]~6750                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[2]~6751                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[2]~6751                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[2]~6752                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[2]~6752                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[2]~6753                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[2]~6753                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[2]~6754                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[2]~6754                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[2]~6755                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[2]~6755                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[2]~6756                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[2]~6756                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[2]~6757                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[2]~6757                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[2]~6758                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[2]~6758                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[1]~6759                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[1]~6759                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[1]~6760                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[1]~6760                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[1]~6761                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[1]~6761                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[1]~6762                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[1]~6762                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[1]~6763                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[1]~6763                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[1]~6764                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[1]~6764                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[1]~6765                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[1]~6765                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[1]~6766                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[1]~6766                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[1]~6767                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[1]~6767                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[1]~6768                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[1]~6768                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[1]~6769                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[1]~6769                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[0]~6770                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[0]~6770                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[0]~6771                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[0]~6771                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[0]~6772                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[0]~6772                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[0]~6773                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[0]~6773                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[0]~6774                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[0]~6774                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[0]~6775                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[0]~6775                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[0]~6776                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[0]~6776                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[0]~6777                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[0]~6777                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[0]~6778                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[0]~6778                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[0]~6779                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[0]~6779                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G2|Q[1]                                                                         ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G2|Q[1]                                                                         ; regout           ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|Equal99~437                                                                                     ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|Equal99~437                                                                                     ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|Equal99~438                                                                                     ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|Equal99~438                                                                                     ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[4]~6690                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[4]~6690                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[4]~6691                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[4]~6691                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[4]~6692                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[4]~6692                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[4]~6693                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[4]~6693                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[4]~6694                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[4]~6694                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[4]~6695                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[4]~6695                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[4]~6696                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[4]~6696                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[2]~6697                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[2]~6697                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[2]~6698                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[2]~6698                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[2]~6699                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[2]~6699                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[2]~6700                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[2]~6700                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[2]~6701                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[2]~6701                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[2]~6702                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[2]~6702                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[2]~6703                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[2]~6703                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[2]~6704                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[2]~6704                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[2]~6705                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[2]~6705                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[2]~6706                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[2]~6706                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[2]~6707                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[2]~6707                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[1]~6708                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[1]~6708                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[1]~6709                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[1]~6709                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[1]~6710                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[1]~6710                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[1]~6711                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[1]~6711                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[1]~6712                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[1]~6712                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[1]~6713                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[1]~6713                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[1]~6714                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[1]~6714                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[1]~6715                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[1]~6715                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[1]~6716                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[1]~6716                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[1]~6717                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[1]~6717                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[1]~6718                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[1]~6718                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[0]~6719                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[0]~6719                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[0]~6720                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[0]~6720                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[0]~6721                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[0]~6721                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[0]~6722                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[0]~6722                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[0]~6723                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[0]~6723                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[0]~6724                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[0]~6724                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[0]~6725                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[0]~6725                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[0]~6726                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[0]~6726                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[0]~6727                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[0]~6727                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[0]~6728                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[0]~6728                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G4|Q[1]                                                                         ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G4|Q[1]                                                                         ; regout           ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|Equal99~436                                                                                     ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|Equal99~436                                                                                     ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[4]~6674                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[4]~6674                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[4]~6675                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[4]~6675                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[4]~6676                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[4]~6676                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[4]~6677                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[4]~6677                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[4]~6678                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[4]~6678                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[4]~6679                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[4]~6679                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[4]~6680                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[4]~6680                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[2]~6681                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[2]~6681                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[2]~6682                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[2]~6682                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[2]~6683                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[2]~6683                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[2]~6684                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[2]~6684                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[2]~6685                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[2]~6685                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[2]~6686                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[2]~6686                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[2]~6688                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[2]~6688                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[2]~6689                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[2]~6689                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[2]~6690                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[2]~6690                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[2]~6691                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[2]~6691                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[1]~6693                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[1]~6693                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[1]~6694                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[1]~6694                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[1]~6695                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[1]~6695                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[1]~6696                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[1]~6696                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[1]~6697                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[1]~6697                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[1]~6699                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[1]~6699                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[1]~6700                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[1]~6700                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[1]~6701                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[1]~6701                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[1]~6702                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[1]~6702                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[0]~6703                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[0]~6703                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[0]~6704                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[0]~6704                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[0]~6705                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[0]~6705                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[0]~6706                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[0]~6706                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[0]~6707                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[0]~6707                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[0]~6708                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[0]~6708                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[0]~6709                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[0]~6709                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[0]~6710                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[0]~6710                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[0]~6711                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[0]~6711                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[0]~6712                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[0]~6712                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[1]                                                                         ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[1]                                                                         ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|adder14:G7|LessThan0~274                                                                        ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|adder14:G7|LessThan0~274                                                                        ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|Equal99~436                                                                                     ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|Equal99~436                                                                                     ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[4]~6673                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[4]~6673                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[4]~6674                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[4]~6674                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[4]~6675                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[4]~6675                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[4]~6676                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[4]~6676                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[4]~6677                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[4]~6677                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[4]~6678                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[4]~6678                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[2]~6679                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[2]~6679                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[2]~6680                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[2]~6680                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[2]~6681                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[2]~6681                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[2]~6682                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[2]~6682                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[2]~6683                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[2]~6683                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[2]~6684                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[2]~6684                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[2]~6686                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[2]~6686                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[2]~6687                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[2]~6687                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[2]~6688                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[2]~6688                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[2]~6689                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[2]~6689                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[1]~6692                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[1]~6692                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[1]~6693                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[1]~6693                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[1]~6694                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[1]~6694                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[1]~6695                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[1]~6695                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[1]~6697                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[1]~6697                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[1]~6698                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[1]~6698                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[1]~6699                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[1]~6699                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[1]~6700                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[1]~6700                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[0]~6701                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[0]~6701                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[0]~6702                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[0]~6702                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[0]~6703                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[0]~6703                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[0]~6704                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[0]~6704                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[0]~6705                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[0]~6705                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[0]~6706                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[0]~6706                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[0]~6707                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[0]~6707                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[0]~6708                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[0]~6708                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[0]~6709                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[0]~6709                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[0]~6710                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[0]~6710                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|g07_TFF:G0|lpm_ff:lpm_ff_component|dffs[0]                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|g07_TFF:G0|lpm_ff:lpm_ff_component|dffs[0]                                       ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|reseting_reg                                                                                    ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|reseting_reg                                                                                    ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|adder14:G1|LessThan0~278                                                                        ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|adder14:G1|LessThan0~278                                                                        ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|adder14:G1|LessThan0~279                                                                        ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|adder14:G1|LessThan0~279                                                                        ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|counting26                                                                                      ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|counting26                                                                                      ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[25]                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[25]                                                                       ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|adder14:G3|LessThan0~276                                                                        ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|adder14:G3|LessThan0~276                                                                        ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|adder14:G3|LessThan0~277                                                                        ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|adder14:G3|LessThan0~277                                                                        ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|adder14:G5|LessThan0~274                                                                        ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|adder14:G5|LessThan0~274                                                                        ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|adder14:G5|LessThan0~275                                                                        ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|adder14:G5|LessThan0~275                                                                        ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|decode_ppa:lpm_decode|w_anode54w[3]~215 ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|decode_ppa:lpm_decode|w_anode54w[3]~215 ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|decode_ppa:lpm_decode|w_anode54w[3]~219 ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|decode_ppa:lpm_decode|w_anode54w[3]~219 ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|decode_ppa:lpm_decode|w_anode54w[3]     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|decode_ppa:lpm_decode|w_anode54w[3]     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector4~608                                                                                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector4~608                                                                                   ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|state.s2                                                                                        ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|state.s2                                                                                        ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[24]                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[24]                                                                       ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[23]                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[23]                                                                       ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector4~609                                                                                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector4~609                                                                                   ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[22]                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[22]                                                                       ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[21]                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[21]                                                                       ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[20]                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[20]                                                                       ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[19]                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[19]                                                                       ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector4~610                                                                                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector4~610                                                                                   ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector4~611                                                                                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector4~611                                                                                   ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[18]                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[18]                                                                       ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[17]                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[17]                                                                       ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[16]                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[16]                                                                       ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[15]                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[15]                                                                       ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector4~612                                                                                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector4~612                                                                                   ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[14]                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[14]                                                                       ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[13]                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[13]                                                                       ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[12]                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[12]                                                                       ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[11]                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[11]                                                                       ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector4~613                                                                                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector4~613                                                                                   ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[10]                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[10]                                                                       ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[9]                                                                        ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[9]                                                                        ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[8]                                                                        ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[8]                                                                        ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[7]                                                                        ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[7]                                                                        ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector4~614                                                                                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector4~614                                                                                   ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[6]                                                                        ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[6]                                                                        ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[5]                                                                        ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[5]                                                                        ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[4]                                                                        ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[4]                                                                        ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[3]                                                                        ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[3]                                                                        ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector4~615                                                                                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector4~615                                                                                   ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector4~616                                                                                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector4~616                                                                                   ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[2]                                                                        ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[2]                                                                        ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[1]                                                                        ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[1]                                                                        ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector4~617                                                                                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector4~617                                                                                   ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector4~618                                                                                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector4~618                                                                                   ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|state.s1                                                                                        ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|state.s1                                                                                        ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|reseting_reg~78                                                                                 ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|reseting_reg~78                                                                                 ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|reseting_reg~79                                                                                 ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|reseting_reg~79                                                                                 ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|state.s4                                                                                        ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|state.s4                                                                                        ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|counter:G9|count[4]                                                                             ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|counter:G9|count[4]                                                                             ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|counter:G9|count[3]                                                                             ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|counter:G9|count[3]                                                                             ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|done_counting~40                                                                                ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|done_counting~40                                                                                ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|counter:G9|count[0]                                                                             ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|counter:G9|count[0]                                                                             ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|counter:G9|count[1]                                                                             ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|counter:G9|count[1]                                                                             ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|counter:G9|count[2]                                                                             ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|counter:G9|count[2]                                                                             ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|done_counting~3                                                                                 ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|done_counting~3                                                                                 ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|state.s5                                                                                        ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|state.s5                                                                                        ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector11~94                                                                                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector11~94                                                                                   ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|load_binary                                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|load_binary                                                                                     ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~311                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~311                                                                       ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|OR_to_counter                                                                    ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|OR_to_counter                                                                    ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector9~31                                                                                    ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector9~31                                                                                    ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|state.s3                                                                                        ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|state.s3                                                                                        ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector4~619                                                                                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector4~619                                                                                   ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|state.s0                                                                                        ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|state.s0                                                                                        ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector4~620                                                                                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector4~620                                                                                   ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector4~621                                                                                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector4~621                                                                                   ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector5~68                                                                                    ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector5~68                                                                                    ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~312                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~312                                                                       ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~313                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~313                                                                       ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~314                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~314                                                                       ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~315                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~315                                                                       ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~316                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~316                                                                       ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~317                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~317                                                                       ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~318                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~318                                                                       ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~319                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~319                                                                       ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~320                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~320                                                                       ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~321                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~321                                                                       ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~322                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~322                                                                       ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~323                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~323                                                                       ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~324                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~324                                                                       ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~325                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~325                                                                       ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~326                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~326                                                                       ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~327                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~327                                                                       ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~328                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~328                                                                       ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~329                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~329                                                                       ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~330                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~330                                                                       ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~331                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~331                                                                       ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~332                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~332                                                                       ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~333                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~333                                                                       ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~334                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~334                                                                       ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~335                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~335                                                                       ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector4~622                                                                                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector4~622                                                                                   ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|state.s5~328                                                                                    ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|state.s5~328                                                                                    ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|state.s5~329                                                                                    ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|state.s5~329                                                                                    ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector10~55                                                                                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector10~55                                                                                   ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[4]~6780                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[4]~6780                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[4]~6729                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[4]~6729                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector4~623                                                                                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector4~623                                                                                   ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector6~32                                                                                    ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector6~32                                                                                    ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|state.s0~30                                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|state.s0~30                                                                                     ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[3]~6670                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[3]~6670                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[3]~6671                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[3]~6671                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[3]~6673                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[3]~6673                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[3]~6674                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[3]~6674                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[3]~6677                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[3]~6677                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[3]~6678                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[3]~6678                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[3]~6680                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[3]~6680                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[3]~6681                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[3]~6681                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[3]~6781                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[3]~6781                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[5]~6686                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[5]~6686                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[5]~6687                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[5]~6687                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[5]~6689                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[5]~6689                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[5]~6690                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[5]~6690                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[5]~6693                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[5]~6693                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[5]~6694                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[5]~6694                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[5]~6696                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[5]~6696                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[5]~6697                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[5]~6697                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[5]~6782                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[5]~6782                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[5]~6619                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[5]~6619                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[5]~6620                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[5]~6620                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[5]~6622                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[5]~6622                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[5]~6623                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[5]~6623                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[5]~6626                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[5]~6626                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[5]~6627                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[5]~6627                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[5]~6629                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[5]~6629                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[5]~6630                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[5]~6630                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[5]~6730                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[5]~6730                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[3]~6635                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[3]~6635                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[3]~6636                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[3]~6636                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[3]~6638                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[3]~6638                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[3]~6639                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[3]~6639                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[3]~6642                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[3]~6642                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[3]~6643                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[3]~6643                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[3]~6645                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[3]~6645                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[3]~6646                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[3]~6646                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[3]~6731                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[3]~6731                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[3]~6603                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[3]~6603                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[3]~6604                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[3]~6604                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[3]~6606                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[3]~6606                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[3]~6607                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[3]~6607                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[3]~6610                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[3]~6610                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[3]~6611                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[3]~6611                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[3]~6613                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[3]~6613                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[3]~6614                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[3]~6614                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[3]~6714                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[3]~6714                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[5]~6619                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[5]~6619                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[5]~6620                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[5]~6620                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[5]~6622                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[5]~6622                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[5]~6623                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[5]~6623                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[5]~6626                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[5]~6626                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[5]~6627                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[5]~6627                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[5]~6629                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[5]~6629                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[5]~6630                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[5]~6630                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[5]~6715                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[5]~6715                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[5]~6601                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[5]~6601                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[5]~6602                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[5]~6602                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[5]~6604                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[5]~6604                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[5]~6605                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[5]~6605                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[5]~6608                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[5]~6608                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[5]~6609                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[5]~6609                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[5]~6611                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[5]~6611                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[5]~6713                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[5]~6713                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[3]~6617                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[3]~6617                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[3]~6618                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[3]~6618                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[3]~6620                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[3]~6620                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[3]~6621                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[3]~6621                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[3]~6624                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[3]~6624                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[3]~6625                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[3]~6625                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[3]~6627                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[3]~6627                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[3]~6628                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[3]~6628                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[3]~6714                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[3]~6714                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector4~624                                                                                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector4~624                                                                                   ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector4~595                                                                                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector4~595                                                                                   ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[6]~6702                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[6]~6702                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[6]~6703                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[6]~6703                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[6]~6705                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[6]~6705                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[6]~6706                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[6]~6706                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[6]~6709                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[6]~6709                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[6]~6710                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[6]~6710                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[6]~6712                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[6]~6712                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[6]~6713                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[6]~6713                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[6]~6783                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[6]~6783                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[4]~6784                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[4]~6784                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[6]~6651                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[6]~6651                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[6]~6652                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[6]~6652                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[6]~6654                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[6]~6654                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[6]~6655                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[6]~6655                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[6]~6658                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[6]~6658                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[6]~6659                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[6]~6659                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[6]~6661                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[6]~6661                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[6]~6662                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[6]~6662                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[6]~6732                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[6]~6732                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[4]~6733                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[4]~6733                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[6]~6635                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[6]~6635                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[6]~6636                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[6]~6636                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[6]~6638                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[6]~6638                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[6]~6639                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[6]~6639                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[6]~6642                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[6]~6642                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[6]~6643                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[6]~6643                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[6]~6645                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[6]~6645                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[6]~6646                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[6]~6646                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[6]~6716                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[6]~6716                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[4]~6717                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[4]~6717                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[6]~6633                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[6]~6633                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[6]~6634                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[6]~6634                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[6]~6637                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[6]~6637                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[6]~6640                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[6]~6640                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[6]~6644                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[6]~6644                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[6]~6715                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[6]~6715                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[3]~6725                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[3]~6725                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[3]~6726                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[3]~6726                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[3]~6727                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[3]~6727                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[3]~6728                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[3]~6728                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[5]~6729                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[5]~6729                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[5]~6730                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[5]~6730                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[5]~6731                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[5]~6731                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[5]~6732                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[5]~6732                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[5]~6674                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[5]~6674                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[5]~6675                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[5]~6675                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[5]~6676                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[5]~6676                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[5]~6677                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[5]~6677                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[3]~6678                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[3]~6678                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[3]~6679                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[3]~6679                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[3]~6680                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[3]~6680                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[3]~6681                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[3]~6681                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[3]~6658                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[3]~6658                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[3]~6659                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[3]~6659                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[3]~6660                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[3]~6660                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[3]~6661                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[3]~6661                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[5]~6662                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[5]~6662                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[5]~6663                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[5]~6663                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[5]~6664                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[5]~6664                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[5]~6665                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[5]~6665                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[5]~6656                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[5]~6656                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[5]~6657                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[5]~6657                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[5]~6658                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[5]~6658                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[5]~6659                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[5]~6659                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[3]~6660                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[3]~6660                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[3]~6661                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[3]~6661                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[3]~6662                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[3]~6662                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[3]~6663                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[3]~6663                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[6]~6733                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[6]~6733                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[6]~6734                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[6]~6734                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[6]~6735                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[6]~6735                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[6]~6736                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[6]~6736                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[6]~6682                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[6]~6682                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[6]~6683                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[6]~6683                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[6]~6684                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[6]~6684                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[6]~6685                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[6]~6685                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[6]~6666                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[6]~6666                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[6]~6667                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[6]~6667                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[6]~6668                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[6]~6668                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[6]~6669                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[6]~6669                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[6]~6664                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[6]~6664                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[6]~6665                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[6]~6665                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[6]~6666                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[6]~6666                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[6]~6667                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[6]~6667                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[4]~6717                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[4]~6717                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[4]~6718                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[4]~6718                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[4]~6719                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[4]~6719                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[4]~6720                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[4]~6720                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[4]~6721                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[4]~6721                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[4]~6734                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[4]~6734                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[4]~6735                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[4]~6735                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[4]~6736                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[4]~6736                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[4]~6737                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst11|a[4]~6737                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[4]~6785                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[4]~6785                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[4]~6786                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[4]~6786                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[4]~6787                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[4]~6787                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[4]~6788                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst10|a[4]~6788                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|g07_TFF:G0|lpm_ff:lpm_ff_component|dffs[0]~2                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|g07_TFF:G0|lpm_ff:lpm_ff_component|dffs[0]~2                                     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|counter:G9|count[4]~35                                                                          ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|counter:G9|count[4]~35                                                                          ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|counter:G9|count[3]~36                                                                          ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|counter:G9|count[3]~36                                                                          ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|counter:G9|count[0]~37                                                                          ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|counter:G9|count[0]~37                                                                          ; combout          ;
; |TESTBED_CIRCUIT|DIGIT1[6]                                                                                                                  ; |TESTBED_CIRCUIT|DIGIT1[6]                                                                                                                  ; padio            ;
; |TESTBED_CIRCUIT|DIGIT1[5]                                                                                                                  ; |TESTBED_CIRCUIT|DIGIT1[5]                                                                                                                  ; padio            ;
; |TESTBED_CIRCUIT|DIGIT1[4]                                                                                                                  ; |TESTBED_CIRCUIT|DIGIT1[4]                                                                                                                  ; padio            ;
; |TESTBED_CIRCUIT|DIGIT1[3]                                                                                                                  ; |TESTBED_CIRCUIT|DIGIT1[3]                                                                                                                  ; padio            ;
; |TESTBED_CIRCUIT|DIGIT1[2]                                                                                                                  ; |TESTBED_CIRCUIT|DIGIT1[2]                                                                                                                  ; padio            ;
; |TESTBED_CIRCUIT|DIGIT1[1]                                                                                                                  ; |TESTBED_CIRCUIT|DIGIT1[1]                                                                                                                  ; padio            ;
; |TESTBED_CIRCUIT|DIGIT1[0]                                                                                                                  ; |TESTBED_CIRCUIT|DIGIT1[0]                                                                                                                  ; padio            ;
; |TESTBED_CIRCUIT|DIGIT2[6]                                                                                                                  ; |TESTBED_CIRCUIT|DIGIT2[6]                                                                                                                  ; padio            ;
; |TESTBED_CIRCUIT|DIGIT2[5]                                                                                                                  ; |TESTBED_CIRCUIT|DIGIT2[5]                                                                                                                  ; padio            ;
; |TESTBED_CIRCUIT|DIGIT2[4]                                                                                                                  ; |TESTBED_CIRCUIT|DIGIT2[4]                                                                                                                  ; padio            ;
; |TESTBED_CIRCUIT|DIGIT2[3]                                                                                                                  ; |TESTBED_CIRCUIT|DIGIT2[3]                                                                                                                  ; padio            ;
; |TESTBED_CIRCUIT|DIGIT2[2]                                                                                                                  ; |TESTBED_CIRCUIT|DIGIT2[2]                                                                                                                  ; padio            ;
; |TESTBED_CIRCUIT|DIGIT2[1]                                                                                                                  ; |TESTBED_CIRCUIT|DIGIT2[1]                                                                                                                  ; padio            ;
; |TESTBED_CIRCUIT|DIGIT2[0]                                                                                                                  ; |TESTBED_CIRCUIT|DIGIT2[0]                                                                                                                  ; padio            ;
; |TESTBED_CIRCUIT|DIGIT3[6]                                                                                                                  ; |TESTBED_CIRCUIT|DIGIT3[6]                                                                                                                  ; padio            ;
; |TESTBED_CIRCUIT|DIGIT3[5]                                                                                                                  ; |TESTBED_CIRCUIT|DIGIT3[5]                                                                                                                  ; padio            ;
; |TESTBED_CIRCUIT|DIGIT3[4]                                                                                                                  ; |TESTBED_CIRCUIT|DIGIT3[4]                                                                                                                  ; padio            ;
; |TESTBED_CIRCUIT|DIGIT3[3]                                                                                                                  ; |TESTBED_CIRCUIT|DIGIT3[3]                                                                                                                  ; padio            ;
; |TESTBED_CIRCUIT|DIGIT3[2]                                                                                                                  ; |TESTBED_CIRCUIT|DIGIT3[2]                                                                                                                  ; padio            ;
; |TESTBED_CIRCUIT|DIGIT3[1]                                                                                                                  ; |TESTBED_CIRCUIT|DIGIT3[1]                                                                                                                  ; padio            ;
; |TESTBED_CIRCUIT|DIGIT3[0]                                                                                                                  ; |TESTBED_CIRCUIT|DIGIT3[0]                                                                                                                  ; padio            ;
; |TESTBED_CIRCUIT|DIGIT4[6]                                                                                                                  ; |TESTBED_CIRCUIT|DIGIT4[6]                                                                                                                  ; padio            ;
; |TESTBED_CIRCUIT|DIGIT4[5]                                                                                                                  ; |TESTBED_CIRCUIT|DIGIT4[5]                                                                                                                  ; padio            ;
; |TESTBED_CIRCUIT|DIGIT4[4]                                                                                                                  ; |TESTBED_CIRCUIT|DIGIT4[4]                                                                                                                  ; padio            ;
; |TESTBED_CIRCUIT|DIGIT4[3]                                                                                                                  ; |TESTBED_CIRCUIT|DIGIT4[3]                                                                                                                  ; padio            ;
; |TESTBED_CIRCUIT|DIGIT4[2]                                                                                                                  ; |TESTBED_CIRCUIT|DIGIT4[2]                                                                                                                  ; padio            ;
; |TESTBED_CIRCUIT|DIGIT4[1]                                                                                                                  ; |TESTBED_CIRCUIT|DIGIT4[1]                                                                                                                  ; padio            ;
; |TESTBED_CIRCUIT|DIGIT4[0]                                                                                                                  ; |TESTBED_CIRCUIT|DIGIT4[0]                                                                                                                  ; padio            ;
; |TESTBED_CIRCUIT|clk                                                                                                                        ; |TESTBED_CIRCUIT|clk~corein                                                                                                                 ; combout          ;
; |TESTBED_CIRCUIT|start                                                                                                                      ; |TESTBED_CIRCUIT|start~corein                                                                                                               ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|reseting_reg~clkctrl                                                                            ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|reseting_reg~clkctrl                                                                            ; outclk           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|g07_TFF:G0|lpm_ff:lpm_ff_component|dffs[0]~clkctrl                               ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|g07_TFF:G0|lpm_ff:lpm_ff_component|dffs[0]~clkctrl                               ; outclk           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|load_binary~clkctrl                                                                             ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|load_binary~clkctrl                                                                             ; outclk           ;
; |TESTBED_CIRCUIT|clk~clkctrl                                                                                                                ; |TESTBED_CIRCUIT|clk~clkctrl                                                                                                                ; outclk           ;
+---------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------+------------------+


The following table displays output ports that do not toggle to 1 during simulation.
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Missing 1-Value Coverage                                                                                                                                                                                                                                                                                     ;
+---------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------+------------------+
; Node Name                                                                                                                                   ; Output Port Name                                                                                                                            ; Output Port Type ;
+---------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------+------------------+
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G4|Q[6]                                                                         ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G4|Q[6]                                                                         ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[4]                                                                         ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[4]                                                                         ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[5]                                                                         ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[5]                                                                         ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[6]                                                                         ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[6]                                                                         ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[2]~398                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[2]~399                                                                     ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[3]~400                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[3]~401                                                                     ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[4]~404                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[4]~405                                                                     ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[5]~406                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[5]~406                                                                     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[5]~406                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[5]~407                                                                     ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[6]~408                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[6]~408                                                                     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[24]                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[24]                              ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[23]                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[23]                              ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[22]                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[22]                              ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[21]                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[21]                              ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[20]                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[20]                              ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[19]                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[19]                              ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[18]                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[18]                              ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[17]                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[17]                              ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[16]                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[16]                              ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[15]                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[15]                              ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[14]                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[14]                              ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[13]                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[13]                              ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[12]                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[12]                              ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[11]                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[11]                              ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[10]                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[10]                              ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[9]                    ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[9]                               ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[8]                    ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[8]                               ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[7]                    ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[7]                               ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[6]                    ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[6]                               ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[5]                    ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[5]                               ; regout           ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|Equal99~437                                                                                     ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|Equal99~437                                                                                     ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[2]~6687                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[2]~6687                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[1]~6692                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[1]~6692                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[1]~6698                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[1]~6698                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|Equal99~437                                                                                     ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|Equal99~437                                                                                     ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[2]~6685                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[2]~6685                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[1]~6690                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[1]~6690                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[1]~6696                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[1]~6696                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[4]~6711                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[4]~6711                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|adder14:G7|LessThan0~275                                                                        ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|adder14:G7|LessThan0~275                                                                        ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|decode_ppa:lpm_decode|w_anode54w[3]~216 ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|decode_ppa:lpm_decode|w_anode54w[3]~216 ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|decode_ppa:lpm_decode|w_anode54w[3]~217 ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|decode_ppa:lpm_decode|w_anode54w[3]~217 ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|decode_ppa:lpm_decode|w_anode54w[3]~218 ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|decode_ppa:lpm_decode|w_anode54w[3]~218 ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|decode_ppa:lpm_decode|w_anode54w[3]~220 ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|decode_ppa:lpm_decode|w_anode54w[3]~220 ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|decode_ppa:lpm_decode|w_anode54w[3]~221 ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|decode_ppa:lpm_decode|w_anode54w[3]~221 ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[0]                                                                        ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[0]                                                                        ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~336                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~336                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[4]~6713                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[4]~6713                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[4]~6712                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[4]~6712                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[5]~6612                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[5]~6612                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector4~598                                                                                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector4~598                                                                                   ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[6]~6641                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[6]~6641                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[6]~6643                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[6]~6643                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[4]~6716                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[4]~6716                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[4]~6718                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[4]~6718                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[4]~6719                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[4]~6719                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[4]~6720                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[4]~6720                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|~GND                                                                                                                       ; |TESTBED_CIRCUIT|~GND                                                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|reset                                                                                                                      ; |TESTBED_CIRCUIT|reset~corein                                                                                                               ; combout          ;
; |TESTBED_CIRCUIT|binary[25]                                                                                                                 ; |TESTBED_CIRCUIT|binary[25]~corein                                                                                                          ; combout          ;
; |TESTBED_CIRCUIT|binary[24]                                                                                                                 ; |TESTBED_CIRCUIT|binary[24]~corein                                                                                                          ; combout          ;
; |TESTBED_CIRCUIT|binary[23]                                                                                                                 ; |TESTBED_CIRCUIT|binary[23]~corein                                                                                                          ; combout          ;
; |TESTBED_CIRCUIT|binary[22]                                                                                                                 ; |TESTBED_CIRCUIT|binary[22]~corein                                                                                                          ; combout          ;
; |TESTBED_CIRCUIT|binary[21]                                                                                                                 ; |TESTBED_CIRCUIT|binary[21]~corein                                                                                                          ; combout          ;
; |TESTBED_CIRCUIT|binary[20]                                                                                                                 ; |TESTBED_CIRCUIT|binary[20]~corein                                                                                                          ; combout          ;
; |TESTBED_CIRCUIT|binary[19]                                                                                                                 ; |TESTBED_CIRCUIT|binary[19]~corein                                                                                                          ; combout          ;
; |TESTBED_CIRCUIT|binary[18]                                                                                                                 ; |TESTBED_CIRCUIT|binary[18]~corein                                                                                                          ; combout          ;
; |TESTBED_CIRCUIT|binary[17]                                                                                                                 ; |TESTBED_CIRCUIT|binary[17]~corein                                                                                                          ; combout          ;
; |TESTBED_CIRCUIT|binary[16]                                                                                                                 ; |TESTBED_CIRCUIT|binary[16]~corein                                                                                                          ; combout          ;
; |TESTBED_CIRCUIT|binary[15]                                                                                                                 ; |TESTBED_CIRCUIT|binary[15]~corein                                                                                                          ; combout          ;
; |TESTBED_CIRCUIT|binary[14]                                                                                                                 ; |TESTBED_CIRCUIT|binary[14]~corein                                                                                                          ; combout          ;
; |TESTBED_CIRCUIT|binary[13]                                                                                                                 ; |TESTBED_CIRCUIT|binary[13]~corein                                                                                                          ; combout          ;
; |TESTBED_CIRCUIT|binary[12]                                                                                                                 ; |TESTBED_CIRCUIT|binary[12]~corein                                                                                                          ; combout          ;
; |TESTBED_CIRCUIT|binary[11]                                                                                                                 ; |TESTBED_CIRCUIT|binary[11]~corein                                                                                                          ; combout          ;
; |TESTBED_CIRCUIT|binary[10]                                                                                                                 ; |TESTBED_CIRCUIT|binary[10]~corein                                                                                                          ; combout          ;
; |TESTBED_CIRCUIT|binary[9]                                                                                                                  ; |TESTBED_CIRCUIT|binary[9]~corein                                                                                                           ; combout          ;
; |TESTBED_CIRCUIT|binary[8]                                                                                                                  ; |TESTBED_CIRCUIT|binary[8]~corein                                                                                                           ; combout          ;
; |TESTBED_CIRCUIT|binary[7]                                                                                                                  ; |TESTBED_CIRCUIT|binary[7]~corein                                                                                                           ; combout          ;
; |TESTBED_CIRCUIT|binary[6]                                                                                                                  ; |TESTBED_CIRCUIT|binary[6]~corein                                                                                                           ; combout          ;
; |TESTBED_CIRCUIT|binary[5]                                                                                                                  ; |TESTBED_CIRCUIT|binary[5]~corein                                                                                                           ; combout          ;
; |TESTBED_CIRCUIT|binary[4]                                                                                                                  ; |TESTBED_CIRCUIT|binary[4]~corein                                                                                                           ; combout          ;
; |TESTBED_CIRCUIT|binary[3]                                                                                                                  ; |TESTBED_CIRCUIT|binary[3]~corein                                                                                                           ; combout          ;
; |TESTBED_CIRCUIT|binary[2]                                                                                                                  ; |TESTBED_CIRCUIT|binary[2]~corein                                                                                                           ; combout          ;
; |TESTBED_CIRCUIT|binary[1]                                                                                                                  ; |TESTBED_CIRCUIT|binary[1]~corein                                                                                                           ; combout          ;
; |TESTBED_CIRCUIT|binary[0]                                                                                                                  ; |TESTBED_CIRCUIT|binary[0]~corein                                                                                                           ; combout          ;
; |TESTBED_CIRCUIT|reset~clkctrl                                                                                                              ; |TESTBED_CIRCUIT|reset~clkctrl                                                                                                              ; outclk           ;
+---------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------+------------------+


The following table displays output ports that do not toggle to 0 during simulation.
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Missing 0-Value Coverage                                                                                                                                                                                                                                                                                     ;
+---------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------+------------------+
; Node Name                                                                                                                                   ; Output Port Name                                                                                                                            ; Output Port Type ;
+---------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------+------------------+
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G4|Q[6]                                                                         ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G4|Q[6]                                                                         ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[3]                                                                         ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[3]                                                                         ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[4]                                                                         ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[4]                                                                         ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[5]                                                                         ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[5]                                                                         ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[6]                                                                         ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[6]                                                                         ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G4|Q[4]~404                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G4|Q[4]~405                                                                     ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[2]~398                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[2]~399                                                                     ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[3]~400                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[3]~401                                                                     ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[4]~404                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[4]~404                                                                     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[4]~404                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[4]~405                                                                     ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[5]~406                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[5]~406                                                                     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[5]~406                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[5]~407                                                                     ; cout             ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[6]~408                                                                     ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register7:G6|Q[6]~408                                                                     ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[24]                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[24]                              ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[23]                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[23]                              ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[22]                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[22]                              ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[21]                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[21]                              ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[20]                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[20]                              ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[19]                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[19]                              ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[18]                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[18]                              ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[17]                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[17]                              ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[16]                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[16]                              ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[15]                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[15]                              ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[14]                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[14]                              ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[13]                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[13]                              ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[12]                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[12]                              ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[11]                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[11]                              ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[10]                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[10]                              ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[9]                    ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[9]                               ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[8]                    ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[8]                               ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[7]                    ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[7]                               ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[6]                    ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[6]                               ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|counter_reg_bit1a[5]                    ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|safe_q[5]                               ; regout           ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[2]~6687                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[2]~6687                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[1]~6692                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[1]~6692                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[1]~6698                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[1]~6698                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[4]~6672                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[4]~6672                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[2]~6685                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[2]~6685                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[1]~6690                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[1]~6690                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[1]~6691                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[1]~6691                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[1]~6696                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[1]~6696                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[4]~6711                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[4]~6711                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|adder14:G7|LessThan0~275                                                                        ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|adder14:G7|LessThan0~275                                                                        ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|decode_ppa:lpm_decode|w_anode54w[3]~216 ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|decode_ppa:lpm_decode|w_anode54w[3]~216 ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|decode_ppa:lpm_decode|w_anode54w[3]~217 ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|decode_ppa:lpm_decode|w_anode54w[3]~217 ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|decode_ppa:lpm_decode|w_anode54w[3]~218 ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|decode_ppa:lpm_decode|w_anode54w[3]~218 ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|decode_ppa:lpm_decode|w_anode54w[3]~220 ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|decode_ppa:lpm_decode|w_anode54w[3]~220 ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|decode_ppa:lpm_decode|w_anode54w[3]~221 ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|slow_clock:G10|lpm_counter:inst|cntr_ptk:auto_generated|decode_ppa:lpm_decode|w_anode54w[3]~221 ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[0]                                                                        ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q[0]                                                                        ; regout           ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~336                                                                       ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|shift_register26:G8|Q~336                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[4]~6713                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst12|a[4]~6713                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[4]~6712                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[4]~6712                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[5]~6612                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[5]~6612                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector4~598                                                                                   ; |TESTBED_CIRCUIT|G07_binary_to_base100:inst|Selector4~598                                                                                   ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[6]~6636                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[6]~6636                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[6]~6641                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[6]~6641                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[6]~6643                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[6]~6643                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[4]~6716                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[4]~6716                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[4]~6718                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[4]~6718                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[4]~6719                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[4]~6719                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[4]~6720                                                                                       ; |TESTBED_CIRCUIT|g07_segment_decoder:inst13|a[4]~6720                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|~GND                                                                                                                       ; |TESTBED_CIRCUIT|~GND                                                                                                                       ; combout          ;
; |TESTBED_CIRCUIT|binary[25]                                                                                                                 ; |TESTBED_CIRCUIT|binary[25]~corein                                                                                                          ; combout          ;
; |TESTBED_CIRCUIT|binary[24]                                                                                                                 ; |TESTBED_CIRCUIT|binary[24]~corein                                                                                                          ; combout          ;
; |TESTBED_CIRCUIT|binary[23]                                                                                                                 ; |TESTBED_CIRCUIT|binary[23]~corein                                                                                                          ; combout          ;
; |TESTBED_CIRCUIT|binary[22]                                                                                                                 ; |TESTBED_CIRCUIT|binary[22]~corein                                                                                                          ; combout          ;
; |TESTBED_CIRCUIT|binary[21]                                                                                                                 ; |TESTBED_CIRCUIT|binary[21]~corein                                                                                                          ; combout          ;
; |TESTBED_CIRCUIT|binary[20]                                                                                                                 ; |TESTBED_CIRCUIT|binary[20]~corein                                                                                                          ; combout          ;
; |TESTBED_CIRCUIT|binary[19]                                                                                                                 ; |TESTBED_CIRCUIT|binary[19]~corein                                                                                                          ; combout          ;
; |TESTBED_CIRCUIT|binary[18]                                                                                                                 ; |TESTBED_CIRCUIT|binary[18]~corein                                                                                                          ; combout          ;
; |TESTBED_CIRCUIT|binary[17]                                                                                                                 ; |TESTBED_CIRCUIT|binary[17]~corein                                                                                                          ; combout          ;
; |TESTBED_CIRCUIT|binary[16]                                                                                                                 ; |TESTBED_CIRCUIT|binary[16]~corein                                                                                                          ; combout          ;
; |TESTBED_CIRCUIT|binary[15]                                                                                                                 ; |TESTBED_CIRCUIT|binary[15]~corein                                                                                                          ; combout          ;
; |TESTBED_CIRCUIT|binary[14]                                                                                                                 ; |TESTBED_CIRCUIT|binary[14]~corein                                                                                                          ; combout          ;
; |TESTBED_CIRCUIT|binary[13]                                                                                                                 ; |TESTBED_CIRCUIT|binary[13]~corein                                                                                                          ; combout          ;
; |TESTBED_CIRCUIT|binary[12]                                                                                                                 ; |TESTBED_CIRCUIT|binary[12]~corein                                                                                                          ; combout          ;
; |TESTBED_CIRCUIT|binary[11]                                                                                                                 ; |TESTBED_CIRCUIT|binary[11]~corein                                                                                                          ; combout          ;
; |TESTBED_CIRCUIT|binary[10]                                                                                                                 ; |TESTBED_CIRCUIT|binary[10]~corein                                                                                                          ; combout          ;
; |TESTBED_CIRCUIT|binary[9]                                                                                                                  ; |TESTBED_CIRCUIT|binary[9]~corein                                                                                                           ; combout          ;
; |TESTBED_CIRCUIT|binary[8]                                                                                                                  ; |TESTBED_CIRCUIT|binary[8]~corein                                                                                                           ; combout          ;
; |TESTBED_CIRCUIT|binary[7]                                                                                                                  ; |TESTBED_CIRCUIT|binary[7]~corein                                                                                                           ; combout          ;
; |TESTBED_CIRCUIT|binary[6]                                                                                                                  ; |TESTBED_CIRCUIT|binary[6]~corein                                                                                                           ; combout          ;
; |TESTBED_CIRCUIT|binary[5]                                                                                                                  ; |TESTBED_CIRCUIT|binary[5]~corein                                                                                                           ; combout          ;
; |TESTBED_CIRCUIT|binary[4]                                                                                                                  ; |TESTBED_CIRCUIT|binary[4]~corein                                                                                                           ; combout          ;
; |TESTBED_CIRCUIT|binary[3]                                                                                                                  ; |TESTBED_CIRCUIT|binary[3]~corein                                                                                                           ; combout          ;
; |TESTBED_CIRCUIT|binary[2]                                                                                                                  ; |TESTBED_CIRCUIT|binary[2]~corein                                                                                                           ; combout          ;
; |TESTBED_CIRCUIT|binary[1]                                                                                                                  ; |TESTBED_CIRCUIT|binary[1]~corein                                                                                                           ; combout          ;
; |TESTBED_CIRCUIT|binary[0]                                                                                                                  ; |TESTBED_CIRCUIT|binary[0]~corein                                                                                                           ; combout          ;
+---------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------+------------------+


+---------------------+
; Simulator INI Usage ;
+--------+------------+
; Option ; Usage      ;
+--------+------------+


+--------------------+
; Simulator Messages ;
+--------------------+
Info: *******************************************************************
Info: Running Quartus II Simulator
    Info: Version 8.0 Build 215 05/29/2008 SJ Full Version
    Info: Processing started: Fri Nov 07 14:06:13 2008
Info: Command: quartus_sim --read_settings_files=on --write_settings_files=off g07_LAB4 -c g07_LAB4
Info: Using vector source file "G07_binary_to_base100_TESTBED/testbed_WAVE.vwf"
Info: Overwriting simulation input file with simulation results
    Info: A backup of testbed_WAVE.vwf called g07_LAB4.sim_ori.vwf has been created in the db folder
Info: Inverted registers were found during simulation
    Info: Register: |TESTBED_CIRCUIT|G07_binary_to_base100:inst|counter:G9|count[4]
    Info: Register: |TESTBED_CIRCUIT|G07_binary_to_base100:inst|counter:G9|count[3]
    Info: Register: |TESTBED_CIRCUIT|G07_binary_to_base100:inst|counter:G9|count[0]
Info: Option to preserve fewer signal transitions to reduce memory requirements is enabled
    Info: Simulation has been partitioned into sub-simulations according to the maximum transition count determined by the engine. Transitions from memory will be flushed out to disk at the end of each sub-simulation to reduce memory requirements.
Info: Simulation partitioned into 1 sub-simulations
Info: Simulation coverage is      86.45 %
Info: Number of transitions in simulation is 143229
Info: Vector file testbed_WAVE.vwf is saved in VWF text format. You can compress it into CVWF format in order to reduce file size. For more details please refer to the Quartus II Help.
Info: Quartus II Simulator was successful. 0 errors, 0 warnings
    Info: Peak virtual memory: 117 megabytes
    Info: Processing ended: Fri Nov 07 14:06:19 2008
    Info: Elapsed time: 00:00:06
    Info: Total CPU time (on all processors): 00:00:02


